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EIA JESD 8-6:1995
New product
EIA JESD 8-6:1995
High Speed Transceiver Logic (HSTL) A 1.5V Output Buffer Supply Voltage Based Interface Standard for Digital Integrated CircuitsMore info
This standard is a 1.5 volt high performance CMOS-based interface document suitable for high I/O count CMOS and BiCMOS devices operating at frequencies in excess of 200 Mhz.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 31.200 : Integrated circuits. Microelectronics
35.200 : Interface and interconnection equipment |
| Number of pages | 20 |
| Year | 1990 |
| Document history | |
| Country | USA |
| Keyword | EIA JESD 8;EIA 8;EIA 8.6;8;EIA JESD8-6 |