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EIA JESD 35-1:1995

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EIA JESD 35-1:1995

General Guidelines for Designing Test Structures for the Wafer-Level Testing of Thin Dielectrics

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This addendum expands the usefulness of the Standard 35 (JESD35) by detailing the various sources of measurement error that could effect the test results obtained by the ramped tests described in JESD35. Each source of error is described and its implications on test structure design is noted. This addendum can be used as a guide when designing test structures for the qualification and characterization of thin oxide reliability, specifically, by implementing accelerated voltage or current ramp tests.

Author EIA
Editor EIA
Document type Standard
Format File
ICS 31.140 : Piezoelectric devices
Number of pages 26
Modify EIA JESD 35-A (2001-04)
Year 1990
Document history
Country USA
Keyword EIA JESD 35;EIA 35;EIA 35.1;35;EIA JESD35-1