Cart
0
Product
Products
(empty)
No products
To be determined
Shipping
$0.00
Total
Product successfully added to your shopping cart
Quantity
Total
There are 0 items in your cart.
There is 1 item in your cart.
Total products
Total shipping
To be determined
Total
Sale!
View larger
View larger
EIA JESD 51-4:1997
New product
EIA JESD 51-4:1997
Thermal Test Chip Guideline (Wire Bond Type Chip)More info
This guideline describes design requirements for wire bond type semiconductor chips to be used for thermal resistance listing of IC packages. This document provides specific guidelines for chip design but allows flexibility in the materials and layout requirements.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 31.080.01 : Semiconductor devices in general
|
| Number of pages | 14 |
| Modified by | EIA JESD 51-4 Errata (1997-09) |
| Year | 1990 |
| Document history | |
| Country | USA |
| Keyword | EIA JESD 51;EIA 51;EIA 51.4;51;EIA JESD51-4 |